The phrase “top gun” generally refers to hot-shot fighter pilots performing amazing feats high in the sky, but increasingly it’s being used to describe great engineering managers doing amazing things on land. Numetrics has put together an online seminar covering the best practices of leading IC project planners.

The webinar describes eight techniques used by top-gun engineering managers, followed by a demonstration of Numetrics’ NMX-ERP™ solution and IC Industry Database containing more than 1400 completed IC designs from multiple industry segments.

The webinar presented the following best practices:

1. Computing IC complexity statistically
2. Estimation of resource requirements based on models
3. Rigorous “what-if” analysis for schedule / resource optimization
4. Benchmarking project execution assumptions
5. Determining the most aggressive, yet achievable project plan
6. Quantitatively assessing the schedule / resource implications of each feature request
7. Performing root-cause analysis at the project close milestone
8. Foreseeing resource shortfalls across the project pipeline.

The demonstration showed a live application of the Numetrics toolset, through a realistic scenario involving balancing IC specification and resource availability in the context of a fixed schedule.

You may view the webinar at http://techonline.stream57.com/numetrics/.

For more information, please e-mail info@numetrics.com

Summary: Schedule predictability is the art and science of determining the completion date for your semiconductor IC project, based on a statistical model, validated across multiple designs.

When you plan a project, you are working with incomplete information. Organizational changes, specification changes, technical challenges and more conspire to make it difficult to accurately predict when your new product will be ready.

Schedule predictability is the art and science of determining the completion date for your project, based on a statistical model, validated across multiple designs. The key ingredients are your design’s complexity, coupled with your resource plan. With these two inputs, Numetrics can significantly improve the accuracy of your schedule predictions. One customer went from consistent overruns to accuracy within a few percent on the first designs they modeled in the Numetrics toolset.

How is this possible? The core is the Numetrics ability:

• To understand which factors drive complexity
• To create a normalized characterization of your design that allows comparison with others.

When we compare your proposed design with historical productivity and schedule information, we can statistically determine the expected schedule for your new project. The accuracy of the model is enhanced by our industry database of over 1200 designs, coupled with specific information from your company’s historical project record.

The result is a robust, realistic prediction of the schedule, based on

• Complexity
• Resource availability and
• Historical data.

The value is a greatly enhanced ability to meet your market windows, time and time again.

Summary: Comparing the specifics of your semiconductor design with industry and company history enables insightful what-if scenario analysis to help manage development programs effectively .

During the planning stages for a chip design, there are a number of variables that can be tweaked in the creation of the final product plan. We can reduce or expand the feature set for a new device. We can reduce or extend the schedule. And we can reduce or increase the number of full-time-equivalent (FTE) staff allocated to the project. By manipulating these variables, we can negotiate a plan between the different stakeholders. In some cases, resources are the limiting factor. In others, the schedule is non-negotiable (for example a lot of consumer products must be ready for CES).

Running a lot of plans against all these variables has historically been difficult and time-consuming. In addition, the results have always been subject to arguments because there has been no trusted model to relate complexity, resources and schedule. Numetrics changes all that. By tweaking resource, schedule or feature set (complexity) assumptions, NMX-ERP can rapidly generate graphs that show the feasibility of each plan, and compare it with company and industry norms using their proprietary complexity engine and plan synthesizer.

The speed and defensibility of these analyses lends them great power. It is not rational to assume productivity or schedules that are significantly different from past performance, so any feasible plan must lie close to the lessons of history. There is a cost to adding features, or to shrinking the schedule, or to reducing headcount. The most effective way to negotiate these choices is with the aid of an objective toolset that combines the specifics of your design and plan with industry and company history. The tool is fast enough that you can run tens or even hundreds of plans in minutes or hours. From these scenarios you can then pick the plan that best meets your business goals.

Summary: Realistic semiconductor IC project planning hinges on industry-norm effort, which is the comparison of the actual productivity achieved by teams across the industry and the actual complexity of their designs.

Complexity is a measurement of how difficult it is to complete a design. It’s a measurement based on many attributes of the design, carefully correlated across multiple historical designs. But in order to plan, we need to know the amount of effort it will take to complete a design of a certain complexity. The answer lies in a comparison of the actual productivity achieved by teams across the industry and the actual complexity of their designs.

From this comparison we can calculate the amount of complexity an average designer can implement in a unit of time. Because this is a normative value calculated across the industry, we call it industry norm effort.

We can also make the same calculation for your company—assessing the amount of complexity your designers have historically been able to implement in a unit time. By comparing this with the industry norm, you will get a sense of how your team is doing as compared with the industry.

But the main use of industry norm effort is in conjunction with the complexity data for a proposed design:

• We can accurately and rapidly calculate the total effort required for that design using either your company data, or the industry norm data.

This provides a firm foundation for realistic planning, while still allowing you to set aggressive (but not unrealistic) targets for your team.

Summary: Design complexity can be quantified and communicated in a way that makes IC projects predictable and more productive.

It doesn’t take a rocket scientist to know that the resources and time required to build a chip vary from one design to another. The variation is a function of how difficult the chip will be to build. We measure that and call it complexity.

The hard part, however, is to know which attributes of the design correlate to the effort required to build the chip.

• Is clock speed important?
• What about the number of transistors?
• Re-use?
• Analog and mixed signal?
• Voltage islands?
• Modes?

The list goes on and on. One of the reasons why the NMX-ERP™ software suite accurately forecasts the time and resource requirements for a design is that our engineers, using more than a thousand design projects, have developed a deep understanding of just how hard a given project may be so your engineers can be more productive.

Knowing how to translate chip-design attributes into complexity is the foundation of apples-to-apples comparisons between designs. That’s critical to making sure your latest design can be compared with other industry designs, as well as designs your company has done in the past. After taking in all the complexity factors as chip specifications, Numetrics’ engines can reliably and rapidly calculate the relative complexity of your design, as compared with every other design in our industry database. That’s the foundation upon which all the plan synthesis, what-if scenario analysis, re-planning and root-cause analysis capabilities of NMX-ERP are built.