In December, we were honored to participate in a Design & Reuse panel in Grenoble, France, titled “IP Reuse vs. IP Leverage: What’s the difference and what are the issues?”
Andrea Fortunato, our European director of professional services, represented us and gave an overview of the particular challenges that design reuse brings. He blogged about it right after the panel (Design Reuse: It’s Harder Than it Looks).
Our friends at D&R have just posted an audio Webinar of that panel. It’s definitely worth a listen if you’re designing with cores and trying to take advantage of reusability.
Have you had design reuse challenges recently? If so, feel free to comment on this post to let us know what they were and how you overcame them. Improving productivity in the semiconductor industry is a communal effort!
Related posts:
- The Design Reuse Paradox By Ron Collett The concept seems simple: The more ip...
- Design Reuse: It’s Harder Than it Looks By Andrea Fortunato How best can we leverage IP...
- DVCon and the Design Productivity Crisis By Ron Collett We’re gearing up for DVCon (Feb....
- Wrestling with Design Quality, Productivity By Jeff Eversmann Sometimes the simple questions are the most...
- Why Most Semiconductor Design Projects Slip Schedule (Summary: More than 80 percent of semiconductor projects slip schedule,...
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Twitter Comment
Design & Reuse has posted a Webinar of its Dec. IP design reuse panel (http://bit.ly/75nTdM) We add some context: [link to post] #eda
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Twitter Comment
Lunch break: Get the inside scoop on design and reuse techniques from a great D&R Webinar [link to post] #semiconductors #eda
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