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    Archive for January, 2009

    How do you quantify design complexity?

    by Numetrics | January 23, 2009 | In Products, Project Planning, Risk Analysis, Schedule Predictability | No Comments


    Summary: Design complexity can be quantified and communicated in a way that makes IC projects predictable and more productive.

    It doesn’t take a rocket scientist to know that the resources and time required to build a chip vary from one design to another. The variation is a function of how difficult the chip will be to build. We measure that and call it complexity.

    The hard part, however, is to know which attributes of the design correlate to the effort required to build the chip.

    • Is clock speed important?
    • What about the number of transistors?
    • Re-use?
    • Analog and mixed signal?
    • Voltage islands?
    • Modes?

    The list goes on and on. One of the reasons why the NMX-ERP™ software suite accurately forecasts the time and resource requirements for a design is that our engineers, using more than a thousand design projects, have developed a deep understanding of just how hard a given project may be so your engineers can be more productive.

    Knowing how to translate chip-design attributes into complexity is the foundation of apples-to-apples comparisons between designs. That’s critical to making sure your latest design can be compared with other industry designs, as well as designs your company has done in the past. After taking in all the complexity factors as chip specifications, Numetrics’ engines can reliably and rapidly calculate the relative complexity of your design, as compared with every other design in our industry database. That’s the foundation upon which all the plan synthesis, what-if scenario analysis, re-planning and root-cause analysis capabilities of NMX-ERP are built.

     
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